1 Setup and Hold Analysis

Definitions

s_E = the (external) setup time, i.e. the setup time of the device containing the flip flop.

h_E = the (external) hold time, i.e. the setup time for the device containing the flip flop.

s_I = the setup time of the flip flop.

s_X = the actual setup time of the flip flop where X = A, B, C, …

h_I = the hold time for the flip flop.

h_X = the actual hold time for the flip flop where X = A, B, C, …

d_E = the data external pin.

c_E = the clock external pin.

d_I = the flip flop data input.

c_I = the flip flop clock input.

y_D = the delay of the data from the external pin to the flip flop data input.

y_C = the delay of the clock from the external pin to the flip flop clock input.

d_E + y_D = d_I

c_E + y_C = c_I

z = y_D - y_C

active edge = the edge (rising, falling) of the clock that loads the data input into the flip flop.

In this document, the rising edge of the clock is assumed to be the active edge for the flip flop.

Figure 1‑1 shows the timing variables of a typical flip flop. Figure 1‑2 shows the simplest case, the latest time at which the data can transition before the active edge of the clock if y_D and y_C both are 0. The data must transition at least s_A, the setup time for the flip flop, before the active edge. In this case, the waveforms for both d_E and d_I are identical. Likewise, the waveforms for both c_E and c_I are identical

Figure 1‑1 Flip Flop Timing Variables

Figure 1‑2 Setup Time With y_D = y_C = 0

Likewise, Figure 1‑3 shows the simplest case, the earliest time at which the data can transition after the active edge of the clock if y_D and y_C both are 0. The data must transition at least h_A, the hold time for the flip flop, after the active edge. In this case, the waveforms for both d_E and d_I are identical. Likewise, the waveforms for both c_E and c_I are identical

Figure 1‑3 Hold Time With y_D = y_C = 0

Figure 1‑4 shows the case where y_D and y_C are > 0. The data must transition at least s_E before the active edge of c_E, the external clock pin. In this case, the waveforms for both d_E and d_I are not identical due to y_D. Likewise, the waveforms for both c_E and c_I are not identical due to y_C. Note that an increase/decrease in y_D makes s_E larger/smaller and an increase/decrease in y_C makes s_E smaller/larger.

Figure 1‑4 Setup Time With y_D > 0, y_C > 0

Figure 1‑5 also shows the case where y_D and y_C are > 0. The data must transition at least h_E after the active edge of c_E, the external clock pin. In this case, the waveforms for both d_E and d_I are not identical due to y_D. Likewise, the waveforms for both c_E and c_I are not identical due to y_C. Note that an increase/decrease in y_D makes h_E smaller/larger and an increase/decrease in y_C makes s_E larger/smaller.

Figure 1‑5 Hold Time With y_D > 0, y_C > 0

Figure 1‑6 shows how y_D, y_C affect the setup and hold for a real device.

Figure 1‑6 Example

2 Setup and Hold Example

Figure 2‑1 illustrates how the external setup and hold is modified by the data and clock delays. Note that the setup and hold regions remain contiguous, but shifted by y_D-y_C = z. Note also that h_E<0, i.e. it is the distance from the rising clock edge to the rightmost edge of the h_A region. Region M is the region where the flip flop may go metasatble. Region N is the region where the flip flop will change state not on c_E0, but on the next c_E clock cycle.

Figure 2‑1 Example

3 Setup And Hold Requirements: MIN Or MAX?

If the required setup and hold times are a max, then the actual setup and hold times of the device will meet the requirement if they are less than the required setup and hold. If setup and hold are a min, then the actual setup and hold of the device will meet the requirement if they are greater than the required setup and hold.

Which is it? Well if I tell my friend that I will meet him at the Arizona border and it will take me at most 2 hours to get there, then the 2 hours is a max, i.e.

I will get there in < 2 hours

Now if I tell my friend that it will take me at least 2 hours to get to the Arizona border, then 2 hours is a min, i.e.

I will get there in > 2 hours

Definitions

s_ER = the required setup

s_EA = the actual setup

Figure 3‑1 shows that if the data transitions anywhere in the s_EA time internal, the data violates the actual setup time of the device. s_ER is defined as the minimum setup time the actual data is capable transitioning before the clock. This means that if s_EA < s_ER, the actual data is guaranteed to transition before s_EA, since it cannot transition before s_ER by definition. Therefore, if

s_EA < s_ER

the setup requirement of the device is met and therefore

s_ER is a MAX

Figure 3‑1 Required And Actual Setup

If s_ER was a MIN, any value of s_EA greater than s_ER would meet the requirement, which as illustrated in Figure 3‑1, would not meet the requirement.

Figure 3‑2 shows that if the data transitions anywhere in the h_EA time internal, the data violates the actual hold time of the device. h_ER is defined as the minimum hold time the actual data is capable transitioning after the clock. This means that if h_EA < h_ER, the actual data is guaranteed to transition after h_EA, since it must transition after h_ER by definition. Therefore, if

h_EA < h_ER

the hold requirement of the device is met and therefore

h_ER is a MAX

Figure 3‑2 Required And Actual Hold

If hs_ER was a MIN, any value of h_EA greater than h_ER would meet the requirement, which as illustrated in Figure 3‑2, would not meet the requirement.